Senior RTL Design Engineer

About the role

Envision Employment Solutions is recruiting a Senior RTL Design Engineer for a partner IT services and IT consulting company. The role covers the full flow from architecture to tapeout: defining the microarchitecture, writing the RTL and ensuring it is clean enough for synthesis, timing and test teams. It is hands-on design work on complex SoCs, with a real say in how each unit is built.

Key responsibilities

• Own feasibility studies and help define system architecture, requirements and external interfaces
• Develop microarchitecture and logic design with functional leads, from architecture to tapeout
• Write RTL in Verilog and SystemVerilog, and run lint and CDC checks with tools such as Synopsys VC SpyGlass
• Create timing constraint files and support synthesis with Synopsys Design Compiler
• Work with synthesis, STA, PD and DFT teams to meet functional, performance, power and area goals
• Debug and fix design issues, and develop flows and scripts to support design work

Required profile

• 7+ years of experience in VLSI design
• BSc or MSc in Electrical or Computer Engineering
• Experience defining microarchitecture for complex design units, with SoC design experience
• Good understanding of verification methodologies
• Excellent English and strong communication skills

Required skills

• Strong Verilog and SystemVerilog skills
• Lint, CDC and low power design practices
• Working knowledge of synthesis and STA tools
• Familiarity with ARM, RISC-V or x86 instruction sets
• Python and Tcl scripting (Perl or C is a plus)