Package Design Engineer

About the role

GlobalFoundries is looking for a senior Package Design Engineer to own the electrical and mechanical design of advanced semiconductor packages used in high‑speed optical interconnect and networking products. The role spans concept development, floor‑planning, design release and support through manufacturing.

Key responsibilities

• Design advanced package architectures such as FCBGA/FCCSP, organic substrates, silicon interposers and 2.5D/3D integration for Co‑Packaged Optics, Optical I/O and pluggable optical modules.
• Develop high‑density substrate routing and controlled‑impedance interconnect for 112G, 224G and 400G electrical interfaces, ensuring signal and power integrity.
• Perform transmission‑line design, differential pair routing, via optimization and return‑current‑path management to meet high‑speed performance targets.
• Define package stack‑ups, design rules and layout guidelines in collaboration with signal‑integrity, power‑integrity and thermal teams.
• Address package reliability early in the design cycle, evaluating warpage, thermo‑mechanical stress, underfill selection and solder‑joint reliability.
• Collaborate with silicon‑photonics, optical and assembly teams on light‑coupling, fiber‑attach and optical alignment considerations.
• Lead design reviews, tolerance analyses and DFM/DFA assessments with substrate vendors, OSATs and internal manufacturing groups.
• Support prototype bring‑up, qualification and issue resolution, feeding lessons learned back into design rules and next‑generation architectures.

Required profile

• MS or PhD in Electrical Engineering, Mechanical Engineering, Packaging Engineering or a related discipline (BS with extensive experience may be considered).
• 10+ years of experience in semiconductor package design, preferably on high‑speed networking, datacenter or optical products.
• Proven track record designing advanced packages that support 112G, 224G and preferably 400G interfaces.

Required skills

• FCBGA and FCCSP technologies
• Organic substrate design
• Silicon interposer, 2.5D and 3D integration
• Flip‑chip assembly
• High‑density substrate routing
• Transmission‑line and controlled‑impedance design
• Differential pair routing and via optimization
• Return‑current‑path management
• Package reliability analysis (warpage, thermo‑mechanical stress, underfill, solder‑joint reliability)